Self-timed bit-serial architectures for digital signal processing

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ucalgary_2005_li_jianchuan_605734.pdf (3.97 MB)

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2005

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Bibliography: p. 91-95

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Li, J. (2005). Self-timed bit-serial architectures for digital signal processing (Master's thesis, University of Calgary, Calgary, Canada). Retrieved from https://ucalgary.scholaris.ca. doi:10.11575/PRISM/156

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http://hdl.handle.net/1880/101157

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