TOWARDS A VLSI DESIGN TOOL SYSTEM

Abstract

This paper outlines a proposal for VLSI design tools at Calgary. The system will allow a designer to specify the behaviour of a circuit and to generate verified designs. The central element in the environment is a very high level intermediate form which guarantees consistency throughout the design cycle. The VLSI tools will be built on top of the JADE distributed prototyping environment which is also under development at the University of Calgary.